Generally, semiconductor packages provide protection for an integrated circuit chip (semiconductor die, or device) from undesirable vagaries of the environment (e.g., dust, humidity, mechanical shock, and the like). Typically, the package has an external surface that is provided with external connections (pins, leads, ball bumps, and the like) for connecting the die to an external system (e.g., for mounting the packaged device to a board, into a socket, and the like). Within the package itself, the die is electrically connected to internal portions of the external connections, by wire bonding, bump bonding, or the like, in some cases via conductive traces within the package. Generally, the overall objective of package design is to provide these various features at the lowest possible manufacturing cost, for a given to application.
A type of packaging that has many favorable attributes is plastic molding over a die that has been mounted to a printed circuit board (PCB). This is sometimes referred to as a "PCB chip carrier package"). In this case, the plastic molding forms a package body, which is a portion of the overall packaging. The PCB forms another portion of the package, and may be provided with pins, ball bumps or the like, as discussed hereinabove. In certain instances, the PCB may be a multi-layer PCB, as is well known.
Commonly-owned U.S. Pat. No. 5,262,927, incorporated by reference herein, describes a technique involving plastic molding a package body on one side (surface) of a PCB, wherein the molded body is formed in a central area of the PCB, and does not extend to the edges (periphery) thereof. This is referred to in the patent as a "partially-molded PCB chip carrier". There are listed, on the summary page of that patent, a number of references cited, which are also incorporated by reference herein as being generally instructive.
The following patents, incorporated by reference herein, are also cited as being generally instructive of plastic molding techniques: U.S. Pat. No. 4,887,149; U.S. Pat. No. 5,136,366; U.S. Pat. No. 5,130,761; JP 52-53665; and JP 58-143557.
The present invention is particularly directed to molded PCB type packages (or chip carriers). Examples of such packages are Plastic Ball Grid Arrays (PBGAS), Plastic Pin Grid Arrays (PPGAs), and Plastic Chip Carriers (PCCs).
For a molded PCB package, the mold tool consists of two, mating, clamshell-type halves. The top mold half typically has a cavity that is used to form the molded body of the package. The bottom mold half typically has a shallow recess for receiving and locating the PCB substrate. The recess in the bottom mold half is nominally as deep as the thickness of the PCB.
With the substrate in the mold (and with a die mounted atop or within the substrate, collectively referred to as "to the substrate"), the two halves are closed around the substrate and the plastic mold material (molding compound) is transferred in liquid form (e.g., through runners and gates, as is well known) into the top mold cavity. With the molding compound in its liquid form, the mold must form a seal around the perimeter (periphery) of the mold cavity to prevent the liquid plastic from leaking out of the cavity. For a fully-overmolded package, the faces of the mold halves, outside of the area of the substrate are expected to contact one another (in a perimeter area of the mold), prior to injecting molding compound into the cavity. For a partially-overmolded package, the top mold half seals to the surface of the substrate being partially-overmolded.
For partially-overmolding a plastic body on a PCB substrate, it is necessary that the top mold half clamp onto the surface of the substrate, to prevent the liquid molding compound from leaking out of the cavity and onto the surface of the substrate outside of an area whereas it is desired to form the package body. To this end, the top mold is typically designed to compress the substrate by 2 mils, to ensure a good seal.
Typically, the mold is a precision machined tool that is designed for close tolerance based on a designated PCB substrate thickness. However, in the fabrication of the PCB substrate, the thickness of the substrate sometimes varies from batch-to-batch. This is especially evident in the case of multi-layer PCB substrates, and when the number of layers changes with specific designs. This makes it difficult, at best, to have a common mold tool that is usable (viable) for molding a plastic body on different thicknesses substrates. Generally, a different mold is required for each different thickness substrate. Further, for a given substrate, close thickness control is required, and is often difficult to achieve.
As mentioned above, a mold may be designed to compress a substrate by 2 mils, to ensure a good seal. When too little pressure is used (e.g., less than 2 mils of compression), the molding compound can leak out of the cavity onto the surface of the substrate causing, inter alia, poor filling of the cavity and flashing (excess molding compound on the surface of the substrate, outside of the area of the package body).
Typically, a single layer PCB substrate may vary in thickness (from substrate-to-substrate) up to 10% from its design (nominal) thickness. For example, a substrate designed to have a thickness of 62 mils (which is a common substrate thickness) can easily be expected to vary in thickness from 59 mils to 65 mils. In such a situation, the mold will be designed to close at 57 mils, to ensure that there is a 2 mils compression ("closing pressure") exerted on the substrate, for the thinnest expected substrate (59 mils). This, however, means that a 65 mil substrate will be compressed by the same mold by 8 mils, or four times as much as the thinner substrate was compressed. Hence, it is seen that for a range of substrate thicknesses, the closing pressure exerted by a common mold can vary widely. This (the pressure on the surface of the substrate, especially excess pressure) can result in deformation of the PCB material. The deformation can result in damage to the fine metal traces on the PCB surface (and, in the case of multi-layer PCBs, within the layers of the substrate).
With the expected variation in thickness of substrates, especially multi-layer substrates, the clamping pressure evidently varies in a rather uncontrollable manner. This makes it virtually impossible to mold packages from different substrate manufacturing batches which exhibit variations in thickness. Also, changes in substrate designs, layers, and hence thickness, will require modifications in the mold tool. In the least, it is undesirable that any process be so poorly controlled, especially so late in the overall process of fabricating and packaging a semiconductor device.